Detector Readout Electronics

Pre Amplifiers

Analoge Preamplifier VV50

VV50 is a discrete charge sensitive pre-amplifier with configurable peaking time and gain. It is designed for negative input signals whereas the output signal polarity may be configured. Input and output are AC coupled.

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CDT has designed the detectors for neutron instrumentation around the 64 channel charge sensitive readout ASIC CIPix 1.1 designed and developed at the ASIC laboratory of Universität Heidelberg. The pre-amplifier and shaper circuitry was developed by Dr. Ulrich Trunk for the HELIX chip and later transfered to the CIPix.

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DAQ Electronics


CASCADE DAQbox is an FPGA based interface and processing device with a USB-data and control link to an operating PC that can be configured for detector readout and experimental control.

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CDRS Board

The CDRS System is the successor of the classical DAQbox using a Xilinx Serial 6 Spartan device and can operate with up to four ASICs.

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CDRE System

The CDRE System is employing the Xilinx Serial 7 Artix device. It is envisioned to comply with ESS DAQ necessities and is equipped with a high performance jitter cleaning device that will allow the distribution and synchronization of a global time stamp to the CDRE devices in the field.

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